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lpc176x: Enable full speed peripheral clocks on SPI and I2C

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Scale the bus speed within the peripheral instead of on the system bus
as scaling on the system bus slows down general register access to the
peripheral.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
2018-11-21 20:40:34 -05:00
parent 4bbd631086
commit cbbc6801a0
3 changed files with 8 additions and 2 deletions
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5
src/lpc176x/spi.c
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@@ -23,6 +23,9 @@ spi_init(void)
gpio_peripheral(0, 17, 2, 0);
gpio_peripheral(0, 18, 2, 0);
// Setup clock
enable_peripheral_clock(PCLK_SSP0);
// Set initial registers
LPC_SSP0->CR0 = 0x07;
LPC_SSP0->CPSR = 254;
@@ -40,7 +43,7 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
// Setup clock rate and mode
struct spi_config res = {0, 0};
uint32_t pclk = SystemCoreClock / 4;
uint32_t pclk = SystemCoreClock;
uint32_t div = DIV_ROUND_UP(pclk/2, rate) << 1;
res.cpsr = div < 2 ? 2 : (div > 254 ? 254 : div);
res.cr0 = 0x07 | (mode << 6);