docs: Add step rate benchmark for stm32h7
Signed-off-by: Konstantin Vogel <konstantin.vogel@gmx.net> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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@@ -248,6 +248,26 @@ results were obtained by running an STM32F407 binary on an STM32F446
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| 1 stepper | 46 |
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| 3 stepper | 205 |
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### STM32H7 step rate benchmark
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The following configuration sequence is used on a STM32H743VIT6:
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```
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allocate_oids count=3
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config_stepper oid=0 step_pin=PD4 dir_pin=PD3 invert_step=-1 step_pulse_ticks=0
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config_stepper oid=1 step_pin=PA15 dir_pin=PA8 invert_step=-1 step_pulse_ticks=0
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config_stepper oid=2 step_pin=PE2 dir_pin=PE3 invert_step=-1 step_pulse_ticks=0
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finalize_config crc=0
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```
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The test was last run on commit `00191b5c` with gcc version
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`arm-none-eabi-gcc (15:8-2019-q3-1+b1) 8.3.1 20190703 (release)
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[gcc-8-branch revision 273027]`.
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| stm32h7 | ticks |
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| -------------------- | ----- |
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| 1 stepper | 44 |
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| 3 stepper | 198 |
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### STM32G0B1 step rate benchmark
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The following configuration sequence is used on the STM32G0B1:
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