lpc176x: Use full peripheral clock speed; fix UART interface

Commit ae89a659 caused a regression in the lpc176x UART handling.
After that commit the UART clock divisor would need to be 6.25 on
lpc1768 or 7.5 on lpc1769, but the code only supports whole numbers.

Set the PCLKSELx registers at startup and return to using full speed
peripheral clocks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

src/lpc176x/main.c

@@ -55,7 +55,7 @@ enable_pclock(uint32_t pclk)
 uint32_t
 get_pclock_frequency(uint32_t pclk)
 {
-    return CONFIG_CLOCK_FREQ / 4;
+    return CONFIG_CLOCK_FREQ;
 }
 
 // Main entry point - called from armcm_boot.c:ResetHandler()