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stm32: Support for USART5 on STM32G0B1 (#6105)

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Support for USART5 on PD2,3

Add exception on RCC bits for USART5&6

Signed-off-by: Florin Popescu <florinsgpopescu@gmail.com>
This commit is contained in:
Florin Popescu
2023-04-19 17:47:18 +02:00
committed by GitHub
parent cba119db3a
commit 40b4b34998
3 changed files with 23 additions and 0 deletions
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11
src/stm32/stm32f0_serial.c
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@@ -78,6 +78,13 @@
#define USARTx_FUNCTION GPIO_FUNCTION(8)
#define USARTx UART4
#define USARTx_IRQn UART4_IRQn
#elif CONFIG_STM32_SERIAL_USART5
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD2,PD3");
#define GPIO_Rx GPIO('D', 2)
#define GPIO_Tx GPIO('D', 3)
#define USARTx_FUNCTION GPIO_FUNCTION(3)
#define USARTx USART5
#define USARTx_IRQn USART5_IRQn
#endif
#if CONFIG_MACH_STM32F031
@@ -90,6 +97,10 @@
// Some of the stm32g0 MCUs have slightly different register names
#if CONFIG_MACH_STM32G0B1
#define USART2_IRQn USART2_LPUART2_IRQn
#define USART3_IRQn USART3_4_5_6_LPUART1_IRQn
#define USART4_IRQn USART3_4_5_6_LPUART1_IRQn
#define USART5_IRQn USART3_4_5_6_LPUART1_IRQn
#define USART6_IRQn USART3_4_5_6_LPUART1_IRQn
#endif
#define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE
#define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE