stm32: Add comments on PLL frequency requirements to clock setup code

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-31 17:00:18 -04:00
parent c0ca4c5cc7
commit 105ce35e1b
9 changed files with 22 additions and 0 deletions
--- a/src/stm32/stm32g4.c
+++ b/src/stm32/stm32g4.c
@@ -76,6 +76,8 @@ gpio_clock_enable(GPIO_TypeDef *regs)
    RCC->AHB2ENR;
 }

+// PLL (g4) input: 2.66 to 16Mhz, vco: 96 to 344Mhz, output: 2.06 to 170Mhz
+
 #if !CONFIG_STM32_CLOCK_REF_INTERNAL
 DECL_CONSTANT_STR("RESERVE_PINS_crystal", "PF0,PF1");
 #endif